Deep Learning Automates Parameter Extraction For 2D Transistors (Stanford, SLAC)

Researchers from Stanford University and SLAC National Accelerator Laboratory published a technical paper titled “Deep Learning to Automate Parameter Extraction and Model Fitting of Two-Dimensional Transistors.”

Abstract Excerpt: “We present a deep learning approach to extract physical parameters (e.g., mobility, Schottky contact barrier height, and defect profiles) of two-dimensional (2D) transistors from electrical measurements, enabling automated parameter extraction and technology computer-aided design (TCAD) fitting. To facilitate this task, we implement a simple data augmentation and pretraining approach by training a secondary neural network to approximate a physics-based device simulator.”

Find the technical paper here. August 2026.

Bennett, Robert K. A., Jan-Lucas Uslu, Harmon F. Gault, Asir Intisar Khan, Lauren Hoang, Tara Peña, Kathryn Neilson, Young Suh Song, Zhepeng Zhang, Andrew J. Mannix, and Eric Pop. “Deep Learning to Automate Parameter Extraction and Model Fitting of Two-Dimensional Transistors.” Research, 2026, article 1103. https://doi.org/10.34133/research.1103. Creative Commons license.

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