Controlling Voltage Droop In 2.5D PIM Chiplet Architectures (Washington St., UW-Madison)

Researchers from Washington State University and University of Wisconsin–Madison published a technical paper titled “ReVolt: Power Delivery Network-Aware Voltage Droop Control for 2.5D PIM Chiplet Architectures.”

Abstract

“Processing-in-memory (PIM)-based 2.5D multi-chiplet platforms are enablers for machine learning (ML) workloads. However, their performance is affected by the power delivery network (PDN), where varying chiplet-level current demand induces spatially and temporally varying voltage droop. These droop events lead to voltage violations, degrades system performance, and impact inference accuracy for ML workloads. In this work, we propose ReVolt, a dynamic operation unit (OU)-based framework for mitigating voltage droop in PIM-based multi-chiplet systems. ReVolt leverages an LSTM-based PDN surrogate to predict per-chiplet supply voltage trajectories at runtime, enabling proactive adjustment of OU size to mitigate droop events. By treating OU size as a control knob, ReVolt regulates chiplet-level current demand while maintaining computational accuracy. This approach prevents voltage droop violations and improves energy-delay product (EDP) while preserving ML model inference accuracy. Experimental results demonstrate that ReVolt prevents voltage droop violations while achieving an average 76x reduction in EDP compared to existing fixed and dynamic OU-based baselines, without compromising inference accuracy of ML models.”

Find the technical paper here. August 2026.

Sharma, Vibhanshu, Alish Kanani, Miao Sun, Janardhan Rao Doppa, Umit Y. Ogras, and Partha Pratim Pande. “ReVolt: Power Delivery Network-Aware Voltage Droop Control for 2.5 D PIM Chiplet Architectures.” arXiv preprint arXiv:2608.08496 (2026). https://doi.org/10.48550/arXiv.2608.08496. Creative Commons license.

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