Chip Industry Week In Review

Sticker shock

• Gartner says AI inferencing costs per agentic workflow will increase fivefold through 2028, with the rate of innovation outpacing the cost curve.
• Samsung increased pricing on new 4nm, 5nm, and 8nm foundry orders by up to 15%, reports Reuters. Its Pyeongtaek 4nm line is reportedly running at full capacity. SMIC also raised prices per last week’s earnings call.

New offerings 

• Mitsubishi Chemical will commercialize ultra-high-purity colloidal silica for wafer polishing and CMP slurries used on interconnect layers. The company will build new facilities at its Kyushu Plant, with an expected operational date of October 2028.
• Cerebras introduced a rack-scale system containing three of its latest Wafer Scale Engine chips, which each provide up to 250 PFLOPS of AI compute with 43.2 PB/s of memory bandwidth.
• proteanTecs unveiled a suite of health, power, and performance management solutions for multi-die systems that integrates per-chiplet visibility from pre-assembly screening through SiP production and in-mission operation.

Denial

• Nvidia denied a report by the Information that it plans on launching a LPU for Chinese customers.

Deals

• Silvaco and Dassault Systèmes will co-develop interoperable digital twin workflows for semiconductor manufacturing, spanning equipment-scale plasma simulation, feature-scale semiconductor process modeling, and structural analysis.
• Socionext added Intel 18A-P to its custom-SoC roadmap, starting with a high-performance compute chiplet for AI and data centers, providing another external customer win for Intel Foundry’s leading-edge process.
• Marvell will develop custom silicon for Google’s TPU ecosystem, potentially including inference accelerators, NICs, and memory interface controllers, while Google can buy up to $12.2B worth of Marvell shares.
• Nvidia plans to invest $1.5B in and provide credit support for SoftBank’s SB Energy, which will build and operate a new 8 GW data center in Ohio that uses Nvidia chips and will be leased by OpenAI.

CPO roadmap

• Global researchers, including U. Virginia, MIT, SK hynix, UIUC and Yonsei, published a roadmap for co-packaged optics (CPO) for HPC and AI.

Big hauls

• Groq LLC raised  $350M to build out an AI inference cloud.
• Etched raised $700M to deliver its frontier model inference rack-scale system made up of co-designed chips, packages, PCBs, cold plates, and interconnects. This follows $300M announced last month.
• Velaura AI raised $110M to commercialize its ultra-low-power digital chip IP and design platform for data center XPUs and physical AI.
• Broadcom is reported seeking $60B in debt funding to finance an AI chip deal, per Bloomberg.

Research programs

• The newly released National Security Science and Technology Strategy directs federal agencies to prioritize semiconductor R&D spanning EDA, advanced manufacturing equipment and processes, heterogeneous integration and advanced packaging, AI/RF/optical hardware, 2D materials, and integrated photonics.
• Micron plans to spend $10B over the next decade on a new research lab in Boise, Idaho. Research areas will include memory technologies, advanced memory and compute architectures, packaging, and manufacturing.
• SRC launched a +$13M industry-driven project-based university research program spanning design, manufacturing, and packaging.
• UT Austin researchers are calling for broader access to advanced packaging facilities for universities, national labs and other researchers developing low-volume, high-value systems. Based on input from more than 70 experts, the ‘Chips For Science’ report argues that expanded packaging infrastructure is needed to capitalize on U.S. semiconductor manufacturing investments.

Humanoids and robotics

• An Intel-commissioned study found a growing robotics “readiness gap,” with 60% of leaders expecting to operate robot fleets within five years but only 40% currently having a formal human-robot workforce strategy. Skills shortages, safety concerns, and insufficient edge AI infrastructure remain key barriers.
• Meanwhile, China’s robot market is expected to hit $2B in 2026, with another 60% growth in 2027. However, profit remains a key challenge, reports Trendforce.
• IDC estimates U.S. humanoid robot shipments could be 58% below its baseline by 2030 under a worst-case scenario in which current FCC restrictions remain in place, as U.S. developers continue to depend on China for core components. IDC estimates China currently accounts for 82% of global humanoid shipments, while U.S. builders are not expected to reach scaled mass production until late 2028.

Earnings

• YoY revenue growth: Analog Devices (+40%), JCET (+11.7%), Keysight (+36.5%), Wolfspeed (down 24%).
• Find all the recent earnings across 80 chip companies in this roundup.

Hot Interconnects

• At this week’s Hot Interconnects conference, Arista demonstrated a 12.8-Tb/s, 64-channel liquid-cooled XPO optical module operating at 212 Gb/s per channel, reporting about 130 W total power, and performance meeting emerging IEEE 802.3dj/df requirements.

Fig.1: Fundamental Interconnect Challenges. Source: Ciena/Hot Interconnects

Quick Links for more news

In-Depth
Deals and Funding
New Technologies
Security
Vehicles, Batteries
Trending Video
Research
Quantum
People
Workforce | Education
Events and Webinars

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New Technologies

Manufacturing, materials and test

• JCET fabricated samples of its 11.3:1 high-aspect-ratio TSV technology.
• ATLANT 3D released a platform that combines atomic layer processing with AI-driven materials discovery and validation for semiconductors, advanced packaging, and quantum.
• Coherent started sampling 300mm high thermal conductivity SiC substrates.
• Prodigy Technovations debuted a UFS 5.0 protocol exerciser and analyzer for flash memory interfaces.

IP, systems and interconnects

• Synopsys validated a 3D PCIe 6.0 PHY test chip that delivers up to 128.0 GB/s through an 8-lane configuration with PAM4 signaling.
• StarFive unveiled RISC-V processor IP with a deep out-of-order execution architecture designed for the server market.
• Vuzix started sampling a waveguide bridge for CPO/NPO interconnects in AI data centers.

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Research

NUS researchers demonstrated 0.8-nm amorphous carbon with a dielectric constant of 1.35, high breakdown strength and metal-ion barrier properties, targeting advanced interconnects, CMOS scaling, and monolithic 3D integration.

A UT Dallas-led team developed a closed-loop digital twin for IGZO oxide-semiconductor transistors that combines fabrication, characterization, circuit simulation, surrogate modeling, and Bayesian active learning. The researchers extended it to 1T-1C DRAM optimization and reported roughly 5×, 4× and 3× reductions in experimental effort for device optimization, performance/reliability co-optimization and DRAM optimization, respectively.

U. of Alberta researchers developed a differentiable chip placement method that optimizes directly for post-route PPA rather than relying mainly on wirelength proxies.

U. of Strathclyde and U. of Edinburgh researchers show the “scalability of the optoelectronic platform and the feasibility of ORRAM to interface with spatially-multiplexed optical sources to bring neuromorphic technologies directly into applications that process and sense in the optical domain.”

KAIST developed a semiconductor neuron that tunes and exploits memristor current noise rather than suppressing it. Varying the memristor’s resistance adjusts spike probability, allowing one circuit to selectively encode different time-series frequency ranges for neuromorphic processing.

MIT researchers engineered bacteria that can function as transistors and built circuits that can be printed onto a growth medium in a Petri dish.

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Deals and Funding

More deals

• Siemens and Reinhausen are developing a solid-state transformer for up to 36kV grid voltage that delivers 800 VDC output for AI data centers.
• Satellite company CesiumAstro acquired Jariet Technologies, a provider of RF signal processing ICs.

More fundings

• SweGaN raised $14M to scale production of GaN-on-SiC epitaxial wafers.
• Solinide Photonics raised ~$4.7M to commercialize multi-wavelength silicon nitride photonic ICs with integrated frequency combs for co-packaged optics.
• Singular Photonics raised $2.15M to develop SPAD-based image sensors that integrate on-chip computation.

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Security

AI Security

• OpenAI said it’s slowing the pace of its frontier cyber model development over security concerns after its agents went outside the sandbox to hack Hugging Face last month.
• Palo Alto Networks launched a new AI cybersecurity collaboration meant to deploy proactive “virtual patches” across critical infrastructure.
• Palo Alto Networks also announced an AI security integration collaboration with NTT Data.
• Fortinet expanded its AI security portfolio by acquiring Virtue AI.
• NIST is seeking public input by Sept. 30 on plans to develop human-centered cybersecurity guidance. The agency published a concept paper on the effort last week.
• Georgia Tech researchers are developing AI cyber protections for the state’s existing highway infrastructure, including using AI to detect crashes, stalled vehicles, wrong-way drivers and traffic volume changes.

Attacks & Alerts

• TU Graz and other researchers demonstrate that a Cloudflare framework’s Spectre defenses can be bypassed using microarchitectural timing amplification, enabling a remote attack that leaks JWT tokens from co-located victim workers at up to 12 bits/second. This is orders of magnitude faster than prior attacks, and it prompted Cloudflare to deploy new hardware- and software-based mitigations.
• CISA’s alerts for the week are here.

Government actions

• The U.S. DOJ indicted 17 members of the Iran-based Mabna Institute in connection with an alleged years-long cyber theft campaign that targeted data from dozens of U.S. universities and companies.

Security tech papers

• GPU Side-Channel Attack Exploiting Time-Sliced Scheduling (Korea U)
• Bullseye: Directed Firmware Fuzzing (Sapienza, LUISS)
• Differential Slice Fuzzing for Commit-Induced Bug Detection (Waterloo, Calgary)
• Evaluation of Post-Quantum ACVP Test Vectors (HEOSSI)
• Trusted HW Acceleration for Function Secret Sharing (Penn State)

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Vehicles, Batteries

AVs and connectivity

• Waymo revealed the chip architecture, processor specs, and internal component details for its vehicles’ compute systems, including a custom 5nm ASIC. The company likened its in-vehicle architecture to a “data center” on wheels.
• LG began mass producing a 5G R-16 automotive telematics module that integrates communications and up to 12 antennas in one unit. The system supports 5G, Wi-Fi, GNSS and V2X for SDVs, with deliveries underway to a premium European automaker.
• Uber launched its first robotaxi service in Europe.
• Teradar established a new European headquarters in Germany, with the aim of providing its terahertz imaging sensors for the European AV market.

Batteries

• Battery intelligence company ELECTRA AI has entered a partnership with EV maker OSM to integrate its real-time battery health monitoring tech into OSM’s fleet.
• LG started battery production at its new 226-acre facility in Lansing, MI. The facility will produce LFP battery cells for ESS and NMC cells for Toyota vehicles.

EVs

• Samsung and Volkswagen rolled out a new digital key feature that allows Samsung Galaxy smartphone users to lock, unlock, and start VW EVs from their phone’s wallet.
• Hyundai debuted the GV90, its new flagship electric SUV for its Genesis luxury vehicle brand. The 7-seater has an estimated range of approximately 500km.
• Heart Aerospace conducted a test flight of the largest-ever battery electric aircraft. The company’s 76-foot-long X1 demonstrator aircraft flew for 27 minutes in a test, reportedly using approximately $5 in electricity.

Drones & Electric Flight

• Germany opened the new Technology Center for Drone Security.
• The FAA announced a series of test flights for Electra’s hybrid-electric aircraft testing routes connecting small local airports to major airline hubs.

Vehicle research

• Korean and Japanese researchers demonstrated in-air copper sintering for automotive power-semiconductor packaging. TO-247-3L packages retained 37–44 MPa bonding shear strength after 1,000 hours at 250°C, supporting Cu sintering as a potential alternative to Ag sintering for high-temperature die attach.
• EV-GNN Processor for High-res Vision at the Edge (TU Delft et al.)
• Composite degradation mechanisms in SiC MOSFETs (NCEPU)
• Vehicle Localization w/Roadside Radar & Connected Vehicle Sensing (Aalto U.)
• Sensor-Driven Mission Synthesis for UAV/UGV Swarms (Bundeswehr)

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Trending Video

1 Megawatt Racks In Data Centers: A look inside the next-generation AI server rack.

Synopsys’ Manmeet Walia talks about the unprecedented changes underway to enable faster training and inferencing, and the collection of new technologies needed to make this all work, from 3.5D and 3D-ICs to the disaggregation of memory into tiered structures.

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Quantum

IBM joined and cooled down two cryogenic modules into a single environment, a step toward a future modular ultra-cold system that links hundreds of quantum chips.

New quantum centers

• U. of Queensland opened Australia’s first open-access quantum computing testbed.
• Diraq opened its first U.S. quantum hardware laboratory in Chicago.
• Infleqtion opened its Colorado Quantum Innovation Center.

Quantum research

• MIT researchers developed a room-temperature cavity-magnonic device that generates strongly correlated microwave signals using coupled magnons and photons, eliminating the cryogenic cooling typically required by superconducting approaches. The work could provide a path toward future quantum sensing, radar, and communications, although the current demonstration operates in the classical regime.
• Cornell  researchers developed a krypton-based sputtering process that cuts tantalum deposition temperatures for superconducting quantum devices from above 400°C to 200°C, making the process compatible with semiconductor back-end manufacturing.

And:

• Quantum-device TCAD for silicon double quantum dots (Xidian)
• Parallel optical programming of oxide RRAM (Strathclyde, Edinburgh)
• Fast Nondestructive Readout for High-Clock-Rate Atom Array Quantum Processor (USTC)

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Workforce, Education

National Network for Microelectronics Education (NNME) formed its first Industry Advisory Committee, bringing together companies including Lam Research, Intel, ASML, GF and others to help identify skills gaps and shape U.S. semiconductor curricula and workforce training.

AMD inked an MoU with Mexico’s science ministry for workforce training in HPC, AI, and semiconductors.

India’s government said it is now providing advanced chip-design tools to more than 332 academic institutions and 105 startups. SEMICON India 2026 will also include dedicated workforce-development activities.

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People

SIA named Michael Robbins president and CEO, effective Oct. 1, succeeding John Neuffer.

Kulicke & Soffa named Raj Talluri president and CEO, effective Sept. 1.

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Events and Webinars

Upcoming webinars are here, including:

• Cadence Managed Cloud Service on AWS, Aug. 25
• Upgrading legacy products to USB-C, Aug. 26
• Advanced Packaging at Scale: Power, Performance, and Reliability in the Chiplet Era, Aug. 26
• Tackling the Complexity of Next-Generation IC Packaging, Aug. 28

Find upcoming chip industry events here, including:

EVENTS	Date	Location
SPIE Optics + Photonics	Aug 23 – 27	San Diego
Hot Chips	Aug 23 – 25	Palo Alto, CA
TechWorks: Semiconductor to Systems Summit	Aug 26	London
The Critical Role of Inspection and Metrology in Silicon Photonics Manufacturing	Aug 31	Taipei
Silicon Photonics Global Summit	Aug 31	Taipei
SEMICON Taiwan	Sep 2 – 4	Taipei
SPIE Photomask Technology + Extreme Ultraviolet Lithography	Sep 8 – 11	Monterey, CA
AI Infra Summit 2026	Sep 15 – 17	Santa Clara, CA
SEMICON India	Sep 17 – 19	Delhi, India
JEDEC’s Automotive Electronics Forum	Sep 17	Santa Clara, CA
GSA: 2026 U.S. Executive Forum	Sep 22	Menlo Park, CA
TSMC 2026 North America OIP Ecosystem Forum	Sep 23	Santa Clara, CA
IMAPS Microelectronics Symposium 2026	Sep 28 – Oct 1	Everett, Mass
Microelectronics UK	Sep 29 – 30	London
IEEE International 3D Systems Integration Conference (3DIC)	Oct 1 – 2	Georgia Tech
International Test Conference	Oct 11 – 16	San Antonio, TX
2026 OCP Global Summit	Oct 12 – 15	San Jose, CA
SEMICON West 2026	Oct 13 – 15	San Francisco, CA
PDF Solutions CONNECT: For Semiconductor Manufacturing Analytics and AI	Oct 15 – 16	San Francisco, CA
Jasper User Group 2026: Cadence Connect	Oct 21 – 22	San Jose, CA
OktoberTech Silicon Valley	Oct 22	Mountain View, CA
IEEE International Conference on PHYSICAL ASSURANCE and INSPECTION of ELECTRONICS (PAINE)	Oct 27 – 29	Phoenix, AZ
Micro 2026: IEEE/ACM International Symposium on Microarchitecture	Oct 31 – Nov 4	Athens, Greece
Find all events here.

 

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