Blog Review: Aug. 19

Cadence’s Ravi Vora explains how the AMBA AXI5 Memory Tagging Extension can detect memory misuse with minimal runtime overhead by associating a small allocation tag with each memory granule and checking every pointer access against the expected tag.

Synopsys’ Shawn Carpenter creates a digital twin of the Moon that combines high-fidelity topography, communications modeling, mission dynamics, and hardware validation in a virtual environment to support Artemis planning and operations.

In a podcast, Siemens’ Tova Levy chats with Bob Patti of NHanced Semiconductors about why the wire has become the defining challenge of modern chip design as packaging moves from a backend afterthought to a front-and-center discipline.

Arm’s Christopher Seidl introduces a physical AI development framework that can capture real-world streaming sensor data, replay identical scenarios, reproduce field issues, and validate algorithm improvements using the same inputs.

Keysight’s Pedro Pires suggests bringing chip design data management directly into Visual Studio Code to manage versions, collaborate, and maintain governance without leaving the daily working environment.

SEMI’s Pushkar P. Apte argues that energy efficiency must be a strategic priority for all companies using AI inference, not just data center builders.

And don’t miss the blogs featured in the latest Low Power-High Performance newsletter:

Rambus’ Zaman Mollah explains why efficiently moving and managing data is a defining challenge for data center architects.

Siemens EDA’s Emma-Jane Crozier makes the case for grounding AI agent decisions in their output.

Expedera’s Sharad Chole illustrates why vision-only edge processors are giving way to systems where LLMs, VLMs, and generative features sit alongside traditional perception networks.

Quadric’s Steve Roddy shows why SoC architects need AI silicon that is both highly efficient and fully programmable.

Ayar Labs’ James Nguyen details what’s needed to achieve widespread deployment of co-packaged optics.

Synopsys’ Kant Deshpande explores moving signal processing back onto the host SerDes to reduce system power, latency, and thermal load.

Arm’s Robbie Williamson contends that as AI moves from answering prompts to completing work, infrastructure must optimize the full workflow around the model.

Cadence’s Reela Samuel defines why the relationship between intelligent systems and engineering is becoming deeply coupled across silicon, systems, and computational software.

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